Flash memories are representative non-volatile memories, and are divided into a NAND type and a NOR type. In particular, high integration of the flash memory is in progress, which is accomplished by scaling-down of cell transistors which form a main structure of the flash memory.
When the size of the cell transistor becomes small, the distance between cells may decrease. In particular, a coupling effect in a NAND-type flash memory in which adjacent cells are connected in a string structure may occur between the cells, which changes threshold voltages of the adjacent cells, thus resulting in degradation of reliability in operation of a memory device.
In addition, as the size of a cell transistor decreases, leakage current of a silicon substrate may increase due to a short channel effect.
To solve this problem, a technology of controlling a channel between adjacent cells using a fringing field under a gate bias has been introduced recently, instead of conventionally performing high-concentration doping in source and drain areas of each cell in a string structure of a NAND flash memory. Here, the fringing field may refer to an electric field leaked out of an edge of a strip line. That is, the channel between the adjacent cells may be controlled using the electric field leaked by the gate bias.
However, in the technology of using the fringing field, there is a problem in that the channel has high resistance since the electric field applied to the channel part is not strong enough to form the channel fully. Accordingly, when an operation voltage, such as a read voltage, is applied, it is difficult to obtain a desired amount of current. Therefore, a normal technology of using the fringing field may have a limitation in performing normal program operation, since operation characteristics of a device are degraded and the amount of electrons injected into a trapping layer is small due to a low coupling ratio, compared to the conventional device.